Nkwalite ire ere nke DWIN T5L Smart
A ga-emepụta F-usoro COF smart LCMs n'oge adịghị anya
4.0-inch COF ihuenyo
5.0-inch COF ihuenyo
7.0-inch COF ihuenyo
Ụdị mbụ emepụtara ọtụtụ mmadụ
Nlereanya | Nha ihuenyo (inch) | Mkpebi (pikselụ) | Ọnụahịa ntụaka (13% VAT gụnyere) | Okwu | ||
WN | WTR | WTC | ||||
DMG32240F028_01W | 2.8 | 320*240 | 45 | 50 | \ | Akụkụ nlele sara mbara |
DMG48320F035_01W | 3.5 | 480*320 | 70 | \ | 95 | IPS.Ọdịdị ọzọ maka oji ma ọ bụ agbakwunyere ojii.TP ojii agbakwunyere nke ọma maka ihuenyo WTC. |
DMG48480F040_01W | 4.0 | 480*480 | 68 | \ | 98 | IPS.Ọdịdị ọzọ maka oji ma ọ bụ agbakwunyere ojii.TP ojii agbakwunyere nke ọma maka ihuenyo WTC. |
DMG48270F043_01W | 4.3 | 480*272 | 59 | 65 | \ | Nkiri nlele nkịtị |
DMG80480F043_01W | 4.3 | 480*800 | 68 | \ | 95 | IPS.Ọdịdị ọzọ maka oji ma ọ bụ agbakwunyere ojii.TP ojii agbakwunyere nke ọma maka ihuenyo WTC. |
DMG85480F050_01W | 5.0 | 480*854 | 76 | \ | 110 | IPS.Ọdịdị ọzọ maka oji ma ọ bụ agbakwunyere ojii.TP ojii agbakwunyere nke ọma maka ihuenyo WTC. |
DMG80480F070_01W | 7.0 | 800*480 | 95 | 105 | \ | Nkiri nlele nkịtị |
Ihuenyo nke F-usoro na-eji otu 50Pin 0.5mm pitch FPC interface n'akụkụ onye ọrụ.
Nkọwa interface dị ka ndị a.
Ntụtụ | Nkọwa | I/O | Nkọwa |
1 | +5V | I | Ntinye ọkụ, DC3.6-5.5V. |
2 | +5V | I | |
3 | GND | GND | GND |
4 | GND | GND | |
5 | GND | GND | |
6 | AD7 | I | 5 tinye ADCs.12-bit mkpebi.0-3.3V voltaji ntinye. Ọnụego nlele data nke otu ọwa bụ 16KHz na data AD1, AD3, AD5 na AD7 na-agafe na isi OS ozugbo site na UART3.Enwere ike iji ọwa 4 n'otu n'otu iji bulie ọnụego nlele ruo 64KSPS.Enwere ike nweta ụkpụrụ 64SPS 16bit AD site n'ịnweta oke. |
7 | AD6 | I | |
8 | AD5 | I | |
9 | AD3 | I | |
10 | AD1 | I | |
11 | + 3.3 | O | 3.3V mmepụta, kacha ibu nke 150mA. |
12 | SPK | O | Ọkụ mpụga ma ọ bụ ọkà okwu. |
13 | SD_CD | IO | SD/SDHC interface. |
14 | SD_CK | O | |
15 | SD_D3 | IO | |
16 | SD_D2 | IO | |
17 | SD_D1 | IO | |
18 | SD_D0 | IO | |
19 | PWM0 | O | 2 16-bit PWM mmepụta. Enwere ike ịchịkwa isi OS na ozugbo site na UART3 na oge mmelite kacha nta nke 32μs. |
20 | PWM1 | O | |
21 | P3.3 | IO | |
22 | P3.2 | IO | |
23 | P3.1/EX1 | IO | Enwere ike iji ya dị ka ntinye nkwụsịtụ mpụga 1 n'otu oge, ma na-akwado ma ọkwa voltaji dị ala ma ọ bụ ụdị nkwụsịtụ ihu. |
24 | P3.0/EX0 | IO | Enwere ike iji ya dị ka ntinye nkwụsịtụ mpụta 0 n'otu oge, ma na-akwado ma ọkwa voltaji dị ala ma ọ bụ ụdị nkwụsịtụ ihu. |
25 | P2.7 | IO | |
26 | P2.6 | IO | |
27 | P2.5 | IO | |
28 | P2.4 | IO | |
29 | P2.3 | IO | |
30 | P2.2 | IO | |
31 | P2.1 | IO | |
32 | P2.0 | IO | |
33 | P1.7 | IO | |
34 | P1.6 | IO | |
35 | P1.5 | IO | |
36 | P1.4 | IO | |
37 | P1.3 | IO | |
38 | P1.2 | IO | |
39 | P1.1 | IO | |
40 | P1.0 | IO | |
41 | UART4_TXD | O | UART4 |
42 | UART4_RXD | I | |
43 | UART5_TXD | O | UART5 |
44 | UART5_RXD | I | |
45 | P0.0 | IO | |
46 | P0.1 | IO | |
47 | CAN_TX | O | IKE |
48 | CAN_RX | I | |
49 | UART2_TXD | O | UART2 |
50 | UART2_RXD | I |
A tọhapụrụ Ngwọta Ngosipụta Interface DWIN dị elu
Uru nke ngwọta DWIN
Oge nzipu: Nov-12-2021